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CompiIer Design and Optimization for BWDSP
Author(s): 
Pages: 1656-1661
Year: Issue:  8
Journal: Acta Electronica Sinica

Keyword:  address registerclusteringvectorizationzero overhead loop;
Abstract: BWDSP is a word addressed VLIW DSP supporting clustering and SIMD.Based on open source compiling infras-tructure open64,key technologies of compiler are developed for BWDSP which consist of optimized processing of address register, instruction clustering combined multi-heuristic factors,register allocation and instruction scheduling on clustering architecture.The key optimization technologies of BWDSP compiler on its hardware architecture include vectorization based on dependence analysis, application of effective instruction and recognization of zero overhead loop.Some general attention points for compiler development based on open source compiler infrastructure are presented after the development experience on BWDSP compiler is summarized.
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