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Partial-SOI high voltage laterally double-diffused MOS with a partially buried n~+-layer
Pages: 472-476
Year: Issue:  6
Journal: Chinese Physics B

Keyword:  silicon-on-insulatorbreakdown voltageinterface chargeselectric field;
Abstract: A novel partial silicon-on-insulator laterally double-diffused metal–oxide–semiconductor transistor(PSOI LDMOS)with a thin buried oxide layer is proposed in this paper. The key structure feature of the device is an n+-layer, which is partially buried on the bottom interface of the top silicon layer(PBNL PSOI LDMOS). The undepleted interface n+-layer leads to plenty of positive charges accumulated on the interface, which will modulate the distributions of the lateral and vertical electric fields for the device, resulting in a high breakdown voltage(BV). With the same thickness values of the top silicon layer(10 μm) and buried oxide layer(0.375 μm), the BV of the PBNL PSOI LDMOS increases to 432 V from285 V of the conventional PSOI LDMOS, which is improved by 51.6%.
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