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ji yu fpga de zhi jie shu zi shi pin lv he cheng qi she ji
Author(s): 
Pages: 409-413
Year: Issue:  4
Journal: Acta Scientiarum Naturalium Universitatis Neimongol

Keyword:  FPGADDSphase accumulator;
Abstract: 采用FPGA可编程芯片实现直接数字式频率合成器(DDS)的设计方法,并用VHDL语言在EPM2C5T144C8芯片上实现了DDS的核心功能设计,通过MAX+PLUSII软件对设计进行了仿真,验证了设计的正确性.DDS中的相位累加器使该系统具有较高的频率分辨率,可实现快速频率切换,有广泛的应用价值.
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