The server is under maintenance between 08:00 to 12:00 (GMT+08:00), and please visit later.
We apologize for any inconvenience caused
Login  | Sign Up  |  Oriprobe Inc. Feed
China/Asia On Demand
Journal Articles
Laws/Policies/Regulations
Companies/Products
A Novel Interpolator Controlling Scheme in High-Speed Digital Timing Recovery Loop
Author(s): 
Pages: 1-5
Year: Issue:  10
Journal: Communications Technology

Keyword:  gardner timinginterpolator controllerparallel structure;
Abstract: Timing recovery is one of the core parts for full-digital receivers,its processing speed is a re-straint to the maximum processing speed of the receiver. Based on conventional Gardner timing recovery, a modified timing recovery method involved a parallel controller in the high speed digital receivers is pro-posed. The modified controller can be used to provide interpolated phase for the interpolator to realize the interpolation function and decrease the system's sampling clock via parallel scheme at the same time. With 8psk signals as an example, this configuration is simulated and verified, indicating that the proposed inter-polator controller is a good solution to timing recovery, and effective for increasing data rate in timing loop, and thus can be used to implement fairly high incoming data.
Related Articles
loading...