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Design and Analysis of Equalizer in High-speed Data Transmission Based on FPGA
Author(s): 
Pages: 23-25
Year: Issue:  1
Journal: Electronic Engineer

Keyword:  高速数据传输均衡器恒模算法FPGA;
Abstract: 随着现代通信系统中数据传输速率的越来越高,信道的失真和畸变所引起的IsI(码间干扰)也变得比以往更为严重,如何设计一种有效的信道均衡器来最大程度地降低ISI从而提高通信质量就变得尤为重要.在众多的均衡算法中,恒模算法是一种高效的信道均衡技术,其代价函数仅与接收信号的幅值有关,与相位无关,因而得到了广泛的应用.文中设计的均衡器就是基于CMA(恒模算法)来实现的.在用MATLAB软件对算法仿真验证可行性的基础上,再用FPGA对整个设计进行了分模块实现,最后用ModelSim验证本设计方案可行.
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