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Design and Implementation of SRAM Testing Circuit Based on FPGA
Author(s): 
Pages: 57-59
Year: Issue:  12
Journal: Electronic Engineer

Keyword:  SRAM(静态随机存储器)March'C-算法JTAGBIST;
Abstract: 为了保证独立的SRAM模块或嵌入式SRAM模块功能的完整性与可靠性,必须对SRAM模块进行测试.介绍了一种基于Ahera DE2开发板的面向字节的SRAM测试电路的设计与实现.测试算法采用分为字内和字间测试两部分的高故障覆盖率March C-算法;设计的测试电路可由标准的JTAG(联合测试工作组)接口进行控制.设计的测试电路可测试独立的SRAM模块或作为BIST(内建自测试)电路测试嵌入式SRAM模块.验证结果表明该SRAM测试系统是非常高效的.
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