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Research on multiplier of CSD based on FPGA
Author(s): 
Pages: 87-88
Year: Issue:  4
Journal: ELECTRONIC MEASUREMENT TECHNOLOGY

Keyword:  CSD编码乘法器FPGA;
Abstract: 在数字滤波、离散傅里叶变换等数字信号处理中,乘法运算是一个最基本的运算,乘法运算的速度决定着数字系统的运算速度.本文通过理论与实验研究相结合的方法介绍CSD编码乘法器的运算法则及其在FPGA中的实现过程.通过与二进制乘法器相比较,证明CSD编码乘法器在减少对FPGA资源的占用和提高运算速度方面具有明显的效果.
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