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Hardware implementation of demap in DVB-C decoding system
Author(s): 
Pages: 106-108
Year: Issue:  4
Journal: ELECTRONIC MEASUREMENT TECHNOLOGY

Keyword:  解调前向纠错解相差分解码;
Abstract: 基于欧洲DVB-C标准的有线数字电视的基带解码芯片主要由解调和前向纠错两大模块组成,这两个模块中间由解相模块来连接,解相技术的好坏直接影响了能否成功纠错并输出正确的MPEG码流.本文介绍了从解调模块输出的10位精度的并行信号与前向纠错模块串行输入之间的解相模块针对于不同进制的QAM(4、16、32、64、128、256)的硬件(FPGA或ASIC)实现方法,其中包括了分割、解相和差分解码的硬件设计与实现.
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